1. Field of the Invention
The present invention relates generally to a BGA (Ball Grid Array) package board and a manufacturing method thereof, and more particularly, to a BGA package board and a manufacturing method thereof, capable of preventing solder balls from adhering to each other by adjusting the thickness of a solder ball pad.
2. Description of the Related Art
Recently, as miniaturization and higher integration of multi-functional electronic devices are achieved, BGA package board technology has been rapidly developed to realize lightness, thinness, shortness, and smallness and a fine circuit pattern of a high density. Particularly, the lightness, thinness, shortness, and smallness and the fine circuit pattern have been increasingly required for a CSP (Chip-Sized Package) with a semiconductor chip mounted on the BGA package board.
FIG. 1a to 1k are sectional views to show a method for manufacturing a conventional BGA package board, and FIG. 2 is a sectional view of a CSP with a semiconductor chip mounted on the BGA package board manufactured through the method of FIGS. 1a to 1k. 
As shown in FIG. 1a, a base plate 10 is prepared, which is constructed as follows. The base plate 10 includes a copper clad laminate having an insulating resin layer 11 and copper foil layers 12 and 12′ on which circuit patterns are formed. Prepregs 13, 13′ and copper foils 14, 14′ are laminated on both surfaces of the copper clad laminate.
As shown in FIG. 1b, via holes a are formed to connect circuits of the upper and lower copper foils 14 and 14′ provided on the base plate 10.
As shown in FIG. 1c, copper plating layers 15 and 15′ are formed on the upper and lower copper foils 14 and 14′ and sidewalls of the via holes a to electrically connect the via holes a.
As shown in FIG. 1d, dry films 20 and 20′ are coated on the upper and lower copper plating layers 15 and 15′ of the base plate 10.
As shown in FIG. 1e, the dry films 20 and 20′ are exposed and developed using art work films (not shown) on which predetermined patterns are printed, so that the predetermined patterns are formed on the dry films 20 and 20′. In this case, the pattern comprises a circuit pattern, a land of each via hole a, a wire bonding pad pattern, and a solder ball pad pattern.
As shown in FIG. 1f, the dry films 20 and 20′ each having a predetermined pattern are used as an etching resist, and the base plate 10 is submerged in etchant. Thus, the upper and lower copper films 14 and 14′ and the copper plating layers 15 and 15′ are etched and removed, except for parts corresponding to the patterns of the dry films 20 and 20′.
As shown in FIG. 1g, the dry films 20 and 20′ coated on the upper and lower surfaces of the base plate 10 are stripped.
As shown in FIG. 1h, solder resists 16 and 16′ are coated on the base plate 10, and then dried.
As shown in FIG. 1i, art work films 30 and 30′ on which solder resist patterns are printed come into close contact with the upper and lower solder resists 16 and 16′ of the base plate 10. Next, the solder resists 16 and 16′ are exposed and developed, thus curing the solder resists 16 and 16′ to correspond to the solder resist patterns. In this case, during the exposure process, ultraviolet rays do not penetrate black parts 32 and 32′ on which the solder resist patterns of the art work films 30 and 30′ are printed. Conversely, ultraviolet rays penetrate non-printed parts 31 and 31′, thus curing the solder resists 16 and 16′.
As shown in FIG. 1j, after removing the art work films 30 and 30′, non-cured parts of the solder resists 16 and 16′ are removed. Thereby, the solder resist patterns are formed.
As shown in FIG. 1k, gold plating layers 17 are formed on openings b having the pattern of the upper solder resist 16 of the base plate 10, that is, wire bonding pads. Further, gold plating layers 17′ are formed on openings c having the pattern of the lower solder resist 16′, that is, solder ball pads.
Subsequently, a semiconductor chip 50 is mounted on the board by an adhesive 40, and bonded wires 18 and solder balls 19 are formed. Through the above-mentioned process, a CSP is completed, as shown in FIG. 2.
The method of manufacturing the BGA package board is disclosed in Korean Pat. No. 344,618, which was filed by the applicant of this invention on Nov. 14, 1995.
Now, a pitch between the solder balls 19 of the BGA package board used in the CSP has been gradually reduced (0.8 mm→0.65 mm→0.5 mm→0.4 mm or less).
When the pitch between the solder balls 19 is 0.65 mm or higher, the conventional BGA package board manufactured through the above-mentioned method may be used to manufacture the CSP without any difficulty.
However, when the pitch between the solder balls 19 is 0.5 mm or less, neighboring solder balls 19 may be undesirably adhered to each other (see the circles d defined with dotted lines in FIG. 2).
Particularly, such adhesion of the solder balls 19 may occur more frequently when the BGA package board is mounted on a main board, so that a final electronic product may be unreliable.